砷化镓和砷化铟等化合物半导体材料有突出的电子性能，但加工成本高昂，而且其本身在低成本制造方面无法与硅竞争。但硅电子器件的无情小型化正在逼近其极限，一种具有更好器件性能的替代方法正在变得越来越有吸引力，这种替代方法即将化合物半导体集成到硅中。
现在，Ali Javey及其同事提出利用“外延（取向）转移方法”（从大面积光电子学借用的一种方法）来将单晶砷化铟超薄层集成到硅基质上的一个很有希望的新概念。采用这种方法（该方法涉及利用一种弹性印章将砷化铟纳米线揭下来、将它们转移到一个硅基质上），本文作者们制造出了具有极好器件性能的薄膜晶体管。（生物谷Bioon.com）
生物谷推荐英文摘要：
Nature doi:10.1038/nature09541
Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors
Hyunhyub
Ko,Kuniharu Takei,Rehan Kapadia,Steven Chuang,Hui Fang,Paul W.
Leu,Kartik Ganapathi,Elena Plis,Ha Sul Kim,Szu-Ying Chen,Morten
Madsen,Alexandra C. Ford,Yu-Lun Chueh,Sanjay Krishna,Sayeef
Salahuddin& Ali Javeyajavey@eecs.berkeley.edu
Over the past several years, the inherent scaling limitations of silicon (Si) electron devices have fuelled the exploration of alternative semiconductors, with high carrier mobility, to further enhance device performance1, 2, 3, 4, 5, 6, 7, 8. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied7, 9, 10: such devices combine the high mobility of III–V semiconductors and the well established, low-cost processing of Si technology. This integration, however, presents significant challenges. Conventionally, heteroepitaxial growth of complex multilayers on Si has been explored9, 11, 12, 13—but besides complexity, high defect densities and junction leakage currents present limitations in this approach. Motivated by this challenge, here we use an epitaxial transfer method for the integration of ultrathin layers of single-crystal InAs on Si/SiO2 substrates. As a parallel with silicon-on-insulator (SOI) technology14, we use ‘XOI’ to represent our compound semiconductor-on-insulator platform. Through experiments and simulation, the electrical properties of InAs XOI transistors are explored, elucidating the critical role of quantum confinement in the transport properties of ultrathin XOI layers. Importantly, a high-quality InAs/dielectric interface is obtained by the use of a novel thermally grown interfacial InAsOx layer (~1 nm thick). The fabricated field-effect transistors exhibit a peak transconductance of ~1.6 mS μm?1 at a drain–source voltage of 0.5 V, with an on/off current ratio of greater than 10,000.
